Intranet Catprocess
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  1. Move

    Destination <-- Source

    Affected Flags
    C V N Z
        X X

    The "move" instruction purpose is doing data transfers. It's one of the most used instructions in assembly language. Unlike other instructions, the instruction "move" has many forms depending on where (or from where) you want to transfer data. Source   This instruction can work with the 3 different size of data (8, 16 and 32 bits) using respecively the appropriate size suffix ".b", ".w" and ".l".
    See the Inclr and Declr instructions for post-incrementation and post-decrementation option for index register used with move instruction.

    Forms and variants

    rx = Destination register number (Can be a number between 0 and 15 included.)
    ry = Source register number.
    rz = Offset register number.
    m = multiplicator : can be 1, 2, 4 or 8
    * These addressing more set the "last register" bits of the status register.

    Adressing mode Form Effect
    Immediate   move.b #_8BitsImmediateValue,rx rx <-- ImmediateValue
    move.w #16BitsImmediateValue,rx
    move.l #32BitsImmediateValue,rx
    Register   move.b ry,rx
    rx <-- ry
    move.w ry,rx
    move.l ry,rx
    Indirect *
    move.b (ry),rx rx <-- ContentOfMemoryAddress(ry)
    move.w (ry),rx
    move.l (ry),rx
    move.b ry,(rx)
    ContentOfMemoryAddress(rx) <-- ry
    move.w ry,(rx)
    move.l ry,(rx)

    Indirect
    with
    displacement *

    move.b 16BitsDisp(ry),rx rx <-- ContentOfMemoryAddress(ry+16BitsDisp)
    move.w 16BitsDisp(ry),rx
    move.l 16BitsDisp(ry),rx
    move.b ry,16BitsDisp(rx) ContentOfMemoryAddress(rx+16BitsDisp) <-- ry
    move.w ry,16BitsDisp(rx)
    move.l ry,16BitsDisp(rx)
    Indirect
    with
    offset
    and
    displacement *
    move.b 16BitsDisp(ry+rz*m),rx rx <-- ContentOfMemoryAddress(ry+ 16BitsDisp+rz*m)
    move.w 16BitsDisp(ry+rz*m),rx
    move.l 16BitsDisp(ry+rz*m),rx
    move.b ry,16BitsDisp(rx+rz*m) ContentOfMemoryAddress(rx+ 16BitsDisp+rz*m) <-- ry
    move.w ry,16BitsDisp(rx+rz*m)
    move.l ry,16BitsDisp(rx+rz*m)

     

    Instruction encoding

    I = Immediate value
    S = Source Register
    D = Destination Register
    m = multiplicator (00 = No multiplication, 01 = x2, 10 = x4, 11 = x8)
    
    Instruction Op
    Code
    Cycles Encoding
    move.b #_8BitsImmediateValue, rx 02 8 00000010 0000DDDD IIIIIIII
    move.w #16BitsImmediateValue, rx 42 10 01000010 0000DDDD IIIIIIII IIIIIIII
    move.l #32BitsImmediateValue, rx 82 14 10000010 0000DDDD IIIIIIII IIIIIIII IIIIIIII IIIIIIII
    move.b ry,rx 05 6 00000101 SSSSDDDD
    move.w ry,rx 45 6 01000101 SSSSDDDD
    move.l ry,rx 85 6 10000101 SSSSDDDD
    move.b (ry),rx 03 8 00000011 SSSSDDDD
    move.w (ry),rx 43 10 01000011 SSSSDDDD
    move.l (ry),rx 83 14 10000011 SSSSDDDD
    move.b ry,(rx) 04 8 00000100 SSSSDDDD
    move.w ry,(rx) 44 10 01000100 SSSSDDDD
    move.l ry,(rx) 84 14 10000100 SSSSDDDD
    move.b ry,disp(rx) 06 10 00000110 SSSSDDDD IIIIIIII IIIIIIII
    move.w ry,disp(rx) 46 12 01000110 SSSSDDDD IIIIIIII IIIIIIII
    move.l ry,disp(rx) 86 16 10000110 SSSSDDDD IIIIIIII IIIIIIII
    move.b disp(ry),rx 07 10 00000111 SSSSDDDD IIIIIIII IIIIIIII
    move.w disp(ry),rx 47 12 01000111 SSSSDDDD IIIIIIII IIIIIIII
    move.l disp(ry),rx 87 16 10000111 SSSSDDDD IIIIIIII IIIIIIII
    move.b ry,disp(rx+rz*m) 08 12 00001000 SSSSDDDD MMxxOOOO IIIIIIII IIIIIIII
    move.w ry,disp(rx+rz*m) 48 14 01001000 SSSSDDDD MMxxOOOO IIIIIIII IIIIIIII
    move.l ry,disp(rx+rz*m) 88 18 10001000 SSSSDDDD MMxxOOOO IIIIIIII IIIIIIII
    move.b disp(ry+rz*m),rx 09 12 00001001 SSSSDDDD MMxxOOOO IIIIIIII IIIIIIII
    move.w disp(ry+rz*m),rx 49 14 01001001 SSSSDDDD MMxxOOOO IIIIIIII IIIIIIII
    move.l disp(ry+rz*m),rx 89 18 10001001 SSSSDDDD MMxxOOOO IIIIIIII IIIIIIII

     

     
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